http://www.freshpatents.com/Amplifiers-dtnewntc330.php USPTO Class 330 - Amplifiers en-us Mon, 30 Jan 2012 13:30:55 -0800 1000 Wednesday Thursday Friday Saturday Sunday 141 31 http://www.freshpatents.com/index.php?rss=true http://www.freshpatents.com/images/freshpatentsnav_rss.gif http://www.freshpatents.com/-dt20120126ptan20120019317.php Mon, 30 Jan 2012 13:30:55 -0800 A self-oscillating driver circuit includes a driver stage, a feedforward path which is coupled to an input of the driver stage, and a feedback path which couples an output of the driver stage to an input of the feedforward path. The feedforward path includes a feedforward filter which is designed... http://www.freshpatents.com/-dt20120126ptan20120019318.php Mon, 30 Jan 2012 13:30:55 -0800 Provided is an analog amplifier for amplifying an analog signal and an analog filter, and in particular, an apparatus and method for controlling gain and cutoff frequency of the variable gain amplifier and the variable cutoff frequency filter that is capable of changing the gain and cutoff frequency. The variable... http://www.freshpatents.com/-dt20120126ptan20120019319.php Mon, 30 Jan 2012 13:30:55 -0800 A power amplifier controller circuit controls a power amplifier based upon an amplitude correction signal indicating the amplitude difference between the amplitude of the input signal and an attenuated amplitude of the output signal. The power amplifier controller circuit comprises an amplitude control loop and a phase control loop. The... http://www.freshpatents.com/-dt20120126ptan20120019320.php Mon, 30 Jan 2012 13:30:55 -0800 There is disclosed a method for determining the timing misalignment between a power supply and an output in an envelope tracking amplification stage, the method including the steps of: estimating a distortion parameter in the amplification stage; and determining a timing error in dependence on the estimated distortion parameter.... http://www.freshpatents.com/-dt20120126ptan20120019322.php Mon, 30 Jan 2012 13:30:55 -0800 Disclosed is a low dropout current source that includes a first field effect transistor (FET), a second FET having a drain that is an output for an output voltage and an output current, and a third FET, wherein a gate of the first FET is coupled to both a gate... http://www.freshpatents.com/-dt20120126ptan20120019321.php Mon, 30 Jan 2012 13:30:55 -0800 A buffer for converting sinusoidal waves to square waves with reduced phase noise is described herein. The buffer shunts current from the outputs of a differential amplifier during sinusoidal state transition periods at the differential amplifier inputs to increase the finite slope of square wave transition periods of the output... http://www.freshpatents.com/-dt20120126ptan20120019323.php Mon, 30 Jan 2012 13:30:55 -0800 A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current.... http://www.freshpatents.com/-dt20120126ptan20120019324.php Mon, 30 Jan 2012 13:30:55 -0800 An amplifier includes a first pair of transistors (the first pair) that defines a first output, each transistor of the first pair having a gate coupled to a first input terminal; a second pair of transistors (the second pair) that defines a second output, each transistor of the second pair... http://www.freshpatents.com/-dt20120126ptan20120019325.php Mon, 30 Jan 2012 13:30:55 -0800 A current-mode amplifier including an input stage, a feedback circuit and an output stage is provided. The input stage has an input terminal for receiving an input current of the current-mode amplifier. The input stage generates a corresponding inner current in accordance with the input current and a feedback current.... http://www.freshpatents.com/-dt20120126ptan20120019326.php Mon, 30 Jan 2012 13:30:55 -0800 A Doherty amplifier includes a carrier amplifier including a first FET, the first FET having a plurality of gate electrodes, and a peaking amplifier including a second FET, the second FET having a plurality of gate electrodes, a gate-to-gate interval of the gate electrodes of the second FET being shorter...