http://www.freshpatents.com/Coded-data-generation-or-conversion-dtnewntc341.php USPTO Class 341 - Coded data generation or conversion en-us Thu, 24 Jul 2008 15:02:16 -0700 1000 Wednesday Thursday Friday Saturday Sunday 141 31 http://www.freshpatents.com/index.php?rss=true http://www.freshpatents.com/images/freshpatentsnav_rss.gif http://www.freshpatents.com/Adaptive-multitap-timeout-dt20080717ptan20080169942.php Thu, 24 Jul 2008 15:02:16 -0700 A communication device may receive successive key inputs, determine an average time duration between successive key inputs, start a timeout, determine if a timeout was successful and adjust the timeout period based on the determined success of the timeout.... http://www.freshpatents.com/Integrated-removable-faceplate-for-portable-computing-system-dt20080717ptan20080169943.php Thu, 24 Jul 2008 15:02:16 -0700 An integrated removable functional faceplate for a portable computer system. The removable functional faceplate employs specially located electrical contacts or pads that mate with similarly located electrical contacts mounted on the portable computer system, e.g., a personal digital assistant (PDA) or other electronic device. The electrical contacts of the functional... http://www.freshpatents.com/Dynamic-number-keypad-for-networked-phones-dt20080717ptan20080169944.php Thu, 24 Jul 2008 15:02:16 -0700 Methods and apparatus for allowing images displayed on a keypad of a networked phone to be dynamically changed are disclosed. According to one aspect of the present invention, a networked phone apparatus includes a dynamic keypad and control channel logic. The dynamic keypad has a plurality of dynamic keys that... http://www.freshpatents.com/Systems-and-processes-for-decoding-a-chain-reaction-code-through-inactivation-dt20080717ptan20080169945.php Thu, 24 Jul 2008 15:02:16 -0700 A method for processing a chain reaction codes includes first selecting a source symbol which is associated an output symbol of degree two or higher (i.e., an output symbol which is itself associated with two or more input symbols), and subsequently deactivating the selected source symbol in an attempt to... http://www.freshpatents.com/Deserializer-related-method-and-clock-frequency-divider-dt20080717ptan20080169946.php Thu, 24 Jul 2008 15:02:16 -0700 A deserializer and method for deserializing data are disclosed. The method includes converting data from a serial data domain to a parallel data domain, detecting a comma related to the parallel data while the data is in the serial data domain, wherein conversion of the data from the serial data... http://www.freshpatents.com/Analog-to-digital-converter-with-dc-balanced-serialized-output-dt20080717ptan20080169947.php Thu, 24 Jul 2008 15:02:16 -0700 A method of serializing parallel output from an analog-to-digital converter includes receiving a parallel output from an analog-to-digital converter; serializing the parallel output; and encoding the serialized output such that it is DC balanced. A system for serializing and DC balancing an analog-to-digital converter output includes an analog-to-digital converter that... http://www.freshpatents.com/Filter-adjustment-circuit-dt20080717ptan20080169948.php Thu, 24 Jul 2008 15:02:16 -0700 In a filter adjustment circuit for an analog filter circuit such as a Gm-C filter, an input signal IS from a reference signal generation circuit 1 is inputted to a Gm-C filter 2 to be filtered and then converted by a conversion circuit 3 to a digital signal. A reference... http://www.freshpatents.com/Error-reduction-for-parallel-time-interleaved-analog-to-digital-converter-dt20080717ptan20080169949.php Thu, 24 Jul 2008 15:02:16 -0700 A technique for reducing errors in a PTIC (parallel, time-interleaved analog-to-digital converter) consisting of M ADCs involves sampling an input signal with the PTIC and performing M different DFTs, one for each ADC. Elements of the M DFTs are grouped together according to frequency and multiplied by correction matrices to... http://www.freshpatents.com/Semiconductor-integrated-circuit-dt20080717ptan20080169950.php Thu, 24 Jul 2008 15:02:16 -0700 The semiconductor integrated circuit includes: a plurality of macro cells; and a serial-parallel conversion circuit for converting a serial signal inputted from outside to generate parallel selection control signals during testing, or an A/D conversion circuit for converting an analog signal inputted from outside to generate digital selection control signals... http://www.freshpatents.com/Direct-digital-synthesis-of-transmitter-gain-and-bias-control-curves-dt20080717ptan20080169951.php Thu, 24 Jul 2008 15:02:16 -0700 A transmitter includes a plurality of devices which processes a transmit signal. Examples of such devices include a variable gain amplifier, a power amplifier and/or a modulator. Some other these devices are gain controllable. Some of these devices are bias controllable. Each controllable device receives at least one analog control... http://www.freshpatents.com/Column-parallel-sigma-delta-anolog-to-digital-conversion-with-gain-and-offset-control-dt20080717ptan20080169952.php Thu, 24 Jul 2008 15:02:16 -0700 A sigma-delta modulation sensing circuit and an analog-to-digital converter for an imager that eliminate the erroneous conversion of non-zero analog voltages to zero digital voltages is provided. The sensing circuit includes an offset branch that allows input of an offset voltage that is at least as large as a negative... http://www.freshpatents.com/Semiconductor-integrated-circuit-dt20080717ptan20080169953.php Thu, 24 Jul 2008 15:02:16 -0700 The A/D converter converting an analog input signal into a digital output signal is constructed with a band pass ΔΣ modulator. The band pass ΔΣ modulator includes: a resonator showing a band-pass characteristic at a predetermined frequency and an attenuation characteristic at another frequency; a quantizer; and a local D/A... http://www.freshpatents.com/Ad-conversion-method-apparatus-thereof-solid-state-imaging-device-driving-method-thereof-and-imaging-apparatus-dt20080717ptan20080169955.php Thu, 24 Jul 2008 15:02:16 -0700 An analog-to-digital conversion method includes the steps of outputting an upper-bit conversion reference signal, obtaining a digital value of upper bits on the basis of a period of time from a set time to the time when a magnitude relation between the analog signal and the upper-bit conversion reference signal... http://www.freshpatents.com/Reconfigurable-signal-processor-for-raw-data-patterns-dt20080717ptan20080169954.php Thu, 24 Jul 2008 15:02:16 -0700 A system includes a continual process for detecting specific data patterns and changes according to a configuration of re-definable and process generated variables. A coarse sample reference, a fine sample reference, and a data array reference are applied to provide independent control over the number of observable signal elements, the... http://www.freshpatents.com/Integrated-remote-control-unit-for-operating-a-television-and-a-video-game-unit-dt20080717ptan20080169957.php Thu, 24 Jul 2008 15:02:16 -0700 Methods, systems, and products are disclosed for a control unit. A keypad has a plurality of keys on a housing arranged for receiving an input. A CPU generates control signals to control multiple applications based upon the input received from the keypad. A memory communicates with the CPU and stores... http://www.freshpatents.com/Operating-device-dt20080717ptan20080169956.php Thu, 24 Jul 2008 15:02:16 -0700 An operating device enabling recognition, even in a dark room, that an operation of an operating unit has been detected, whether or not a desired main device is operated by the operating device. The device 1 is connected to a main device 20 via signal lines K and G, and...