http://www.freshpatents.com/Electrical-computers--arithmetic-processing-and-calculating-dtnewntc708.php USPTO Class 708 - Electrical computers: arithmetic processing and calculating en-us Thu, 24 Jul 2008 15:12:31 -0700 1000 Wednesday Thursday Friday Saturday Sunday 141 31 http://www.freshpatents.com/index.php?rss=true http://www.freshpatents.com/images/freshpatentsnav_rss.gif http://www.freshpatents.com/Method-for-modeling-a-structure-of-a-spider-web-using-computer-programming-dt20080717ptan20080172433.php Thu, 24 Jul 2008 15:12:31 -0700 The methods for modeling a structure of a spider web using computer programming are disclosed. First method of modeling elliptical spider webs using computer programming includes inputting variables into computer program to model spider webs; number of radii, number of spirals, length of major and minor axes of hub, length... http://www.freshpatents.com/Method-and-device-for-filtering-a-multidemensional-digital-signal-and-associated-methods-and-devices-for-encoding-and-decoding-dt20080717ptan20080172434.php Thu, 24 Jul 2008 15:12:31 -0700 The invention relates to a method of filtering a multidimensional digital signal comprising a plurality of samples, and comprises the following steps applied to each of the samples to filter, simulating the filtering of the sample to filter by applying at least one filter in a plurality of geometric orientations... http://www.freshpatents.com/Femtosecond-spectroscopy-using-minimum-or-maximum-phase-functions-dt20080717ptan20080172435.php Thu, 24 Jul 2008 15:12:31 -0700 A method determines a transient response of a sample. The method includes providing a measured magnitude of the Fourier transform of a complex electric field temporal profile of a pulse sequence comprising a first pulse indicative of the transient response of the sample and a second pulse. The method further... http://www.freshpatents.com/Optimized-fft-ifft-module-dt20080717ptan20080172436.php Thu, 24 Jul 2008 15:12:31 -0700 We disclose an optimal hardware implementation of the FFT/IFFT operation that minimizes the number of clock cycles required to compute the FFT/IFFT while at the same time minimizing the number of complex multipliers needed. An input module combines a plurality of inputs after applying a multiplication factor to each of... http://www.freshpatents.com/Digital-signal-averaging-using-parallel-computation-structures-dt20080717ptan20080172437.php Thu, 24 Jul 2008 15:12:31 -0700 Systems and methods for digital signal averaging using parallel computation structures are disclosed herein. An exemplary method includes: receiving a series of samples in the time domain, each sample containing a number of bit positions M; averaging, using coefficient polynomial arithmetic, the value in a selected one of the bit... http://www.freshpatents.com/Figure-data-verification-apparatus-and-method-therefor-dt20080717ptan20080172438.php Thu, 24 Jul 2008 15:12:31 -0700 A figure data verification apparatus includes an operation part configured to input design data and writing data converted from the design data and perform an exclusive OR operation between data of a figure included in the design data and data of a figure included in the writing data, a sorting... http://www.freshpatents.com/Method-and-device-for-digitizing-an-analogical-signal-dt20080717ptan20080172439.php Thu, 24 Jul 2008 15:12:31 -0700 This device (10) includes elements (12) for receiving an analogical signal including a data signal in a frequency channel, elements (18) for amplifying the received signal, elements (20) for filtering the amplified signal so as to cut out frequencies outside the frequency channel of the data signal, members (24) for...