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    <title>FreshPatents.com: Electrical computers and digital data processing systems: input/output - USPTO Class 710 Patent Applications Update</title> 
    <link>http://www.freshpatents.com/Electrical-computers-and-digital-data-processing-systems--input-output-dtnewntc710.php</link> 
    <description>USPTO Class 710 - Electrical computers and digital data processing systems: input/output</description>
    <language>en-us</language> 
    <lastBuildDate>Mon,  6 Feb 2012 13:34:42 -0800</lastBuildDate> 
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		<item>
  		<title>Apparatus and method for transiting terminal function between portable terminal and peripheral apparatus</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030379.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>An apparatus and method support transitioning a terminal function between a portable terminal and a peripheral device. A terminal function transition is requested to one or more peripheral devices. Transition data including information regarding configuration of a terminal function is transmitted to the one or more peripheral devices, such that...</description> 
  	</item>



		<item>
  		<title>Transmission device, transmission method, and control program for transmission device</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030380.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>In a communication system using a parallel transmission, in order to provide a technology for an efficient transmission, a transmission device includes a data amount detection means for detecting a data amount of inputted data, a plurality of transmission means for transmitting the data in parallel, and a data allocation...</description> 
  	</item>



		<item>
  		<title>Rechargeable device and method for determining universal serial bus port type</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030381.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A method for detecting a type of a port connected to a USB connector and a rechargeable device with a USB connector, a USB controller and a power management module. The power management module selectively powers up the USB controller depending on the type of port connected to the USB...</description> 
  	</item>



		<item>
  		<title>Direct memory access device for multi-core system and operating method of the same</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030382.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A Direct Memory Access (DMA) device for a multi-core system, and an operating method of the DMA device are provided. The DMA device includes a channel state determining unit to determine whether at least one channel among a source channel and a destination channel is available, the source channel being...</description> 
  	</item>



		<item>
  		<title>Digital media providing device with expandable transcoding capability and method thereof</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030383.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A digital media providing device comprises a first interface for coupling to a first storage device storing a first media data of a first encoding format, a second interface for coupling to a second storage device storing a program code, and a third interface for coupling to a transcoding device....</description> 
  	</item>



		<item>
  		<title>Storage subsystem</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030384.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>The correspondence of the respective ports and the respective microprocessors is dynamically changed based on the load of the respective microprocessors. When an open port MP including a plurality of ports connected to a host computer receives an I/O request from the host computer via a port, it specifies an...</description> 
  	</item>



		<item>
  		<title>Buffer management device which manages buffer transfer, storage apparatus comprising the same device, and buffer management method</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030385.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>According to one embodiment, a table holds buffer transfer information for managing data transfer, specified by each data transfer command, between a transmission FIFO and a buffer or between a reception FIFO and the buffer via a intermediate FIFO. A first sequencer activates buffer transfer for data transfer specified by...</description> 
  	</item>



		<item>
  		<title>Configurable interface controller</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030386.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A flexible input/output controller logic interfaces with existing input/output controllers (IOC's) in order to configure the amount of data sent to and received from the IOC's. The flexible I/O interface receives data from a component at a rate determined by the particular component. The flexible I/O interface then feeds the...</description> 
  	</item>



		<item>
  		<title>Mechanism to flexibly support multiple device numbers on point-to-point interconnect upstream ports</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030387.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A method and apparatus for supporting multiple device numbers on point-to-point interconnect upstream ports. In one embodiment, the method includes a downstream component (DC) that performs discovery of internal device components of the DC during initialization of the DC. Subsequent to the discovery of internal devices of the DC, the...</description> 
  	</item>



		<item>
  		<title>Conversion of a two-wire bus into a single-wire bus</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030388.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A method of conversion by at least one interface circuit connected between a first bus including at least one data wire and one clock wire, and at least one second single-wire bus, of a transmission between a master circuit connected to the first bus and at least one slave circuit...</description> 
  	</item>



		<item>
  		<title>Device for manipulating interface signals</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030390.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A device for manipulating interface signals includes a slave interface, which is connectable to a master interface of a control device, a master interface, which is connectable to a slave interface of a measuring device, and a circuit configuration, which is supplied with at least one data-input signal per interface,...</description> 
  	</item>



		<item>
  		<title>Method and system for memory attack protection to achieve a secure interface</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030391.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A slave device may receive commands from a host device communicatively coupled to the slave device, via a secure interface configured between the slave device and the host device over that coupling. An integrated memory within the slave device may be configured into a plurality of memory portions or regions...</description> 
  	</item>



		<item>
  		<title>Microcomputer</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030389.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>Disclosed is a microcomputer that can gain bus access irrespective of the magnitude relationship between the frequency of a bus master and the frequency of a bus slave. A CPU operates in accordance a first clock, which has a variable frequency. A timer operates in accordance with a second clock....</description> 
  	</item>



		<item>
  		<title>System and method for automatic hardware interrupt handling</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030392.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A processing system is provided consisting of an interrupt pin, multiple registers, a stack pointer, and an automatic interrupt system. The multiple registers store a number of processor states values. When the system detects an interrupt on the interrupt pin the system prepares to enter an exception mode where the...</description> 
  	</item>



		<item>
  		<title>Wireless communication with a dock</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030393.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>In general, the subject matter described in this specification can be embodied in methods, system and program products. A mobile computing device determines that the mobile computing device has physically paired with a docking system. Wireless communication between the mobile computing device and the docking system is automatically established in...</description> 
  	</item>



		<item>
  		<title>Circuit configurations and method for controlling a data exchange in a circuit configuration</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030395.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>In a method for controlling a data exchange between at least one set of data sinks and at least one set of data sources in circuit configurations and circuit sequences, which circuit configurations have at least one arbitration unit, the arbitration unit selects a first data sink (data sink arbitration)...</description> 
  	</item>



		<item>
  		<title>Universal computer management interface</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030394.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>An integrated computer management apparatus allowing a networked administrator to manage a computer via multiple connection types and protocols. A preferred embodiment of the device has a network connection for the administrative users, coupled via an internal Ethernet switch and a processor to keyboard-video-mouse, serial, and Ethernet computer connections. Depending...</description> 
  	</item>



		<item>
  		<title>Combination non-volatile memory and input-output card with direct memory access</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030398.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A removable electronic circuit card having both a memory module with a non-volatile mass storage memory and a separate input-output module so that data transfers may be made through the input-output module directly to and from the mass storage memory in a direct memory access (DMA) type transfer when the...</description> 
  	</item>



		<item>
  		<title>Decoupled memory modules: building high-bandwidth memory systems from low-speed dynamic random access memory devices</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030396.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>Apparatus and methods related to exemplary memory system are disclosed. The exemplary memory systems use a synchronization device to increase channel bus data rates while using relatively-slower memory devices operating at device bus data rates that differ from channel bus data rates....</description> 
  	</item>



		<item>
  		<title>Information processing system and method for controlling information processing system</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030397.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>An information processing system includes a memory, a controller that reads data from a device coupled thereto and writes the data on the memory, a bridge that couples a system bus and an input output bus, the system bus being coupled to the memory and the processor, the input output...</description> 
  	</item>



		<item>
  		<title>Mapping non-prefetchable storage locations into memory mapped input/output space</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030401.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A system including a host and a device. The device has at least one non-prefetchable storage location. The host and the device are configured to map the at least one non-prefetchable storage location into memory mapped input/output space that is addressed via greater than 32 address bits....</description> 
  	</item>



		<item>
  		<title>Mobile phone device platform</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030399.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>Some embodiments relate to an apparatus, method and computer-medium for interacting with a peripheral device (e.g. a mobile phone device) via a USB port. Some embodiments relate to a routine and host device whereby using a technique of function interception, it I possible to intercept the plug-and-play (PnP) handler of...</description> 
  	</item>



		<item>
  		<title>Pci express tlp processing circuit and relay device provided with this</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030402.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A PCI Express TLP processing circuit (10) comprises: a plurality of reception processing sections (2a1); a transmission processing section (2b); and a multiplexer (2c1) that performs transmission to the transmission processing section, selecting one of the reception processing sections; and at least a reception processing section comprises: a redundancy code...</description> 
  	</item>



		<item>
  		<title>Usb connector for wireless communication device</title> 
  		<link>http://www.freshpatents.com/-dt20120202ptan20120030400.php</link> 
  		<pubDate>Mon,  6 Feb 2012 13:34:42 -0800</pubDate> 
  		<description>A Universal Serial Bus (USB) apparatus for USB communication is provided. The USB apparatus includes a Printed Circuit Board (PCB) including a circuit for communicating data with an external device according to a USB communication standard, a connector for connecting to a USB terminal of the external device, and a...</description> 
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