http://www.freshpatents.com/Error-detection-correction-and-fault-detection-recovery-dtnewntc714.php USPTO Class 714 - Error detection/correction and fault detection/recovery en-us Mon, 6 Feb 2012 13:34:47 -0800 1000 Wednesday Thursday Friday Saturday Sunday 141 31 http://www.freshpatents.com/index.php?rss=true http://www.freshpatents.com/images/freshpatentsnav_rss.gif http://www.freshpatents.com/-dt20120202ptan20120030501.php Mon, 6 Feb 2012 13:34:47 -0800 Methods and systems are provided for improving the repair efficacy of a repair action using inferred feedback. The method comprises downloading a repair procedure, which has a probability of success for correcting the fault code. Repair action data is input into to the computing device and is tracked and correlated... http://www.freshpatents.com/-dt20120202ptan20120030502.php Mon, 6 Feb 2012 13:34:47 -0800 A multi-tenant system can be switched to a downtime state to implement a transition from a current state to a target state of a core software platform. During a second phase of the transition an error associated with tenant-specific content of a first customer tenant of the plurality of customer... http://www.freshpatents.com/-dt20120202ptan20120030504.php Mon, 6 Feb 2012 13:34:47 -0800 [Selected Drawing] FIG. 1 When copying copy target information from the online computer 101 to the standby computer 102, a status copy processing unit 110: recognizes, as a synchronous point, a point in time when execution of a first application (AP #1), from among applications 108, is completed; extracts only... http://www.freshpatents.com/-dt20120202ptan20120030503.php Mon, 6 Feb 2012 13:34:47 -0800 A system and method is provided for ensuring high availability for a distributed application. A management object manages multiple scenarios defined for protection units associated with a distributed application. The management object may coordinate various operations performed at the protection units based on management object configuration information.... http://www.freshpatents.com/-dt20120202ptan20120030505.php Mon, 6 Feb 2012 13:34:47 -0800 An electronic calendar includes such features as recurring reminders, dividing unpredictable work loads into equal pieces, template free parsing, a reminders scheduling algorithm to reduce spikes, dynamic delivery and recovery algorithms, methods for splitting the work load between controllers and workers and for monitoring progress, all within the context of... http://www.freshpatents.com/-dt20120202ptan20120030506.php Mon, 6 Feb 2012 13:34:47 -0800 Systems and methods are disclosed for handling read disturbs based on one or more characteristics of read operations performed on a non-volatile memory (“NVM”). In some embodiments, a control circuitry of a system can generate a variable damage value determined based on one or more characteristics of a read operation.... http://www.freshpatents.com/-dt20120202ptan20120030507.php Mon, 6 Feb 2012 13:34:47 -0800 A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive... http://www.freshpatents.com/-dt20120202ptan20120030508.php Mon, 6 Feb 2012 13:34:47 -0800 Techniques used in an automatic failover configuration having a primary database system, a standby database system, and an observer. In the automatic failover configuration, the primary database system remains available even in the absence of both the standby and the observer as long as the standby and the observer become... http://www.freshpatents.com/-dt20120202ptan20120030509.php Mon, 6 Feb 2012 13:34:47 -0800 A processor core includes one or more cache memories and a repair unit. The repair unit may repair locations in the cache memories identified as having errors during an initialization sequence. The repair unit may further cause information corresponding to the repair locations to be stored within one or more... http://www.freshpatents.com/-dt20120202ptan20120030510.php Mon, 6 Feb 2012 13:34:47 -0800 A hard disk drive that is coupled to a non-volatile memory. The non-volatile memory includes data that was designated to be stored in the hard disk drive in a previous time period. When a power loss event is detected the hard disk drive stores the track address of the last... http://www.freshpatents.com/-dt20120202ptan20120030511.php Mon, 6 Feb 2012 13:34:47 -0800 A method is provided for efficiently recovering information in a distributed storage system where a list of values that should be stored on a storage device is maintained. A first convergence round is scheduled to be performed on the list of values to bring each value to an At Maximum... http://www.freshpatents.com/-dt20120202ptan20120030512.php Mon, 6 Feb 2012 13:34:47 -0800 Various embodiments include a software provisioning system and method for a vehicle infotainment computer. Software provisioning of the vehicle infotainment computer may occur during vehicle assembly. A software provisioning request may be received for custom installing software to the vehicle infotainment computer. The custom install may be based on a... http://www.freshpatents.com/-dt20120202ptan20120030513.php Mon, 6 Feb 2012 13:34:47 -0800 A system and method is provided for providing assured recovery for a distributed application. Replica servers associated with the distributed application may be coordinated to perform integrity testing together for the whole distributed application. The replica servers connect to each other in a manner similar to the connection between master... http://www.freshpatents.com/-dt20120202ptan20120030517.php Mon, 6 Feb 2012 13:34:47 -0800 Disclosed is a method for adding performance counters to a .NET application after compilation of the .NET application to Common Intermediate Language code without a requirement for code changes to the original .NET application code or application recompilation from the development side. With regard to a further aspect of a... http://www.freshpatents.com/-dt20120202ptan20120030516.php Mon, 6 Feb 2012 13:34:47 -0800 A method and system for information processing and test case generation. The system includes: a pattern storage module for storing at least one resource identifier patterns, where the resource identifier patterns are extracted from a server code of a web application by analyzing the server code; a client code analyzer... http://www.freshpatents.com/-dt20120202ptan20120030514.php Mon, 6 Feb 2012 13:34:47 -0800 In one embodiment, a method for testing adjustment and configuration is disclosed. The method can include accessing source code of a test framework that is configured for testing a module, creating a configuration folder having a property override for a test suite for the module testing, determining a source root... http://www.freshpatents.com/-dt20120202ptan20120030515.php Mon, 6 Feb 2012 13:34:47 -0800 An attribute collector may collect an attribute set for each test entity of a plurality of test entities associated with a software test executed in a software environment. An attribute analysis signal handler may receive an attribute analysis signal associated with a change in the software environment, and a view... http://www.freshpatents.com/-dt20120202ptan20120030518.php Mon, 6 Feb 2012 13:34:47 -0800 In one embodiment, a processor includes an execution unit and at least one last branch record (LBR) register to store address information of a branch taken during program execution. This register may further store a transaction indicator to indicate whether the branch was taken during a transactional memory (TM) transaction.... http://www.freshpatents.com/-dt20120202ptan20120030519.php Mon, 6 Feb 2012 13:34:47 -0800 A self-checking network is provided, comprising a first command processor configured to execute a performance function and a second command processor configured to execute the performance function, coupled to the first command processor. The self-checking network also comprises a first monitor processor configured to execute a monitor function that is... http://www.freshpatents.com/-dt20120202ptan20120030521.php Mon, 6 Feb 2012 13:34:47 -0800 A method for selectively generating trace data is disclosed. Such a method includes executing a first module on a processor. The processor is operably coupled to a memory storing the first module and one or more branch modules. The method further includes detecting the execution of an instruction of the... http://www.freshpatents.com/-dt20120202ptan20120030520.php Mon, 6 Feb 2012 13:34:47 -0800 A trace output unit for collecting, buffering and outputting trace data generated by trace circuitry monitoring processing activities of a data processing apparatus is described. The trace output unit comprises an input for receiving a stream of trace data; a plurality of data stores arranged in parallel with each other... http://www.freshpatents.com/-dt20120202ptan20120030522.php Mon, 6 Feb 2012 13:34:47 -0800 A fault cause extraction apparatus 10 includes a storage unit 12 and a correlation-destruction-propagation detecting unit 25. Here, the storage unit 12 stores a correlation model including one or more correlation functions, each of which is generated based on a time series of performance information including a plurality of types... http://www.freshpatents.com/-dt20120202ptan20120030523.php Mon, 6 Feb 2012 13:34:47 -0800 Methods and systems are described that improve the alarming logic for Border Gateway Protocol (BGP) flapping events. Embodiments provide an alarm threshold on BGP flapping conditions and alert on BGP related events. A reduction in silent failures and network outage minutes is achieved.... http://www.freshpatents.com/-dt20120202ptan20120030524.php Mon, 6 Feb 2012 13:34:47 -0800 In a method of data processing within a controller ensuring that voting operations are reliably performed error free and in a corresponding controller unit, the input data are characteristic for the particular application where voting occurs. Voting whether or not the incoming data is correct involves a voting comparison method,... http://www.freshpatents.com/-dt20120202ptan20120030525.php Mon, 6 Feb 2012 13:34:47 -0800 Systems and methods are disclosed for automated notification systems. A representative system, among others, can be summarized as follows. A host computer system, or base station, is designed to monitor travel data corresponding to a mobile thing and to initiate a notification communication to a personal communications device (PCD) indicating... http://www.freshpatents.com/-dt20120202ptan20120030526.php Mon, 6 Feb 2012 13:34:47 -0800 A communication device includes a receiving unit, a first determining unit, and a sending unit. The receiving unit is configured to receive, from a terminal device, a plurality of input values corresponding to a plurality of setting items. The first determining unit, when the plurality of setting items includes a... http://www.freshpatents.com/-dt20120202ptan20120030529.php Mon, 6 Feb 2012 13:34:47 -0800 In one or more of the disclosed embodiments, memory cells in a memory device are refreshed upon an indication of a fatigue condition. In one such embodiment, controller monitors behavior parameters of the cells and determines if any of the parameters are outside of a normal range set for each... http://www.freshpatents.com/-dt20120202ptan20120030527.php Mon, 6 Feb 2012 13:34:47 -0800 Disclosed is a semiconductor memory device capable of arbitrarily setting an upper limit of the number of error corrections during a test operation. The semiconductor memory device has a counter, a register, and a comparison circuit. The counter counts the number of error corrections. The register, when an upper limit... http://www.freshpatents.com/-dt20120202ptan20120030528.php Mon, 6 Feb 2012 13:34:47 -0800 As a semiconductor storage device that can efficiently perform a refresh operation, provided is a semiconductor storage device comprising a non-volatile semiconductor memory storing data in blocks, the block being a unit of data erasing, and a controlling unit monitoring an error count of data stored in a monitored block... http://www.freshpatents.com/-dt20120202ptan20120030530.php Mon, 6 Feb 2012 13:34:47 -0800 Exemplary method, system, and computer program embodiments for performing deterministic data verification by a storage controller are provided. Each of a plurality of concurrent write tasks is configured to be placed in a plurality of overlapping data storage ranges by performing at least one of: implementing a data generation function... http://www.freshpatents.com/-dt20120202ptan20120030531.php Mon, 6 Feb 2012 13:34:47 -0800 The disclosed invention provides a structure and method for detecting address line (e.g., wordline, bitline) memory failures. In one embodiment, the method and structure comprise generating an address signature, by re-encoding an internally generated address signal from activated elements (e.g., wordlines) inside a memory array. The regenerated address signature may... http://www.freshpatents.com/-dt20120202ptan20120030532.php Mon, 6 Feb 2012 13:34:47 -0800 A scannable integrated circuit (100) including a functional integrated circuit (P1, P2) having scan chains, multiple scan decompressors (120.1, 120.2), each operable to supply scan bits to some of the scan chains (101.k, 102.k), a shared scan-programmable control circuit (110, 300), a tree circuit (400) coupled with the functional integrated... http://www.freshpatents.com/-dt20120202ptan20120030533.php Mon, 6 Feb 2012 13:34:47 -0800 A method and circuit are provided for implementing switching factor reduction in Logic Built in Self Test (LBIST) diagnostics, and a design structure on which the subject circuit resides. Switching factor reduction logic is coupled to a Pseudo-Random Pattern Generator (PRPG) providing channel input patterns to a plurality of LBIST... http://www.freshpatents.com/-dt20120202ptan20120030534.php Mon, 6 Feb 2012 13:34:47 -0800 Provided are a Physical Uplink Shared CHannel (PUSCH) encoder and an encoding method of the same. The PUSCH encoder includes a plurality of encoding units and a channel interleaving unit interleaving the data transferred from the plurality of encoding units. Herein, the respective encoding units perform encoding operations on different... http://www.freshpatents.com/-dt20120202ptan20120030535.php Mon, 6 Feb 2012 13:34:47 -0800 Various embodiments implement distributed block coding (DBC). DBC can be used for, among other things, distributed forward error correction (DFEC) of source data in communication systems or parity backup for error correction of source data in storage systems where the source data may be corrupted by burst errors. A distributed... http://www.freshpatents.com/-dt20120202ptan20120030538.php Mon, 6 Feb 2012 13:34:47 -0800 A system may be used to predict when a decoding process will fail to correct an error burst within a transmission. A decoder may receive an input bit stream and process it to produce an output bit stream, which may be convolutionally encoded. K-bits of the convolutionally encoded output bit... http://www.freshpatents.com/-dt20120202ptan20120030536.php Mon, 6 Feb 2012 13:34:47 -0800 A method includes, during a first iteration of a first decoder for decoding convolutionally encoded data elements, determining a first value of a first path metric. The method also includes, during a second iteration of the first decoder, determining a second value of the first path metric by using the... http://www.freshpatents.com/-dt20120202ptan20120030537.php Mon, 6 Feb 2012 13:34:47 -0800 The present invention provides a method that protects symbol types by characterizing symbols as one of two types—DATA or NON_DATA, generating a symbol characterization bit, placing the symbol characterization bit at both ends of the symbol, and transmitting the symbol with the symbol characterization bits at both ends. Thus, a... http://www.freshpatents.com/-dt20120202ptan20120030539.php Mon, 6 Feb 2012 13:34:47 -0800 Executed when a channel input (e.g., LDPC) codeword is written to a storage medium, a write-verification method (i) compares the channel input codeword to the written codeword, (ii) identifies any erroneous too bits, and (iii) stores the erroneous-bit indices to a record in a table. At some later time, the... http://www.freshpatents.com/-dt20120202ptan20120030540.php Mon, 6 Feb 2012 13:34:47 -0800 An SRAM memory device including a plurality of memory cells arranged in a plurality of rows and a plurality of columns; each row of memory cells is adapted to store a RAM word; the RAM word includes a corresponding data word, a corresponding ECC word to be used for error... http://www.freshpatents.com/-dt20120202ptan20120030541.php Mon, 6 Feb 2012 13:34:47 -0800 In a transmission device, a determining unit determines, for use in transmission, an LDPC encoding method corresponding to occurrence conditions of external noise from a plurality of LDPC encoding methods each having the same code length and the same code rate and being defined by a different parity check matrix,... http://www.freshpatents.com/-dt20120202ptan20120030542.php Mon, 6 Feb 2012 13:34:47 -0800 A data storage device includes an interface that is configured to interface with a host, a command bus, multiple memory devices that are operably coupled to the command bus and a controller that is operably coupled to the interface and to the command bus. The controller is configured to receive... http://www.freshpatents.com/-dt20120202ptan20120030543.php Mon, 6 Feb 2012 13:34:47 -0800 A method, a memory controller and a processor architecture for protecting an application in a memory are disclosed. The application is cached as memory lines according to a size of a cache line. For example, the method comprises: in response to a load access request from a processor, reading from... http://www.freshpatents.com/-dt20120202ptan20120030544.php Mon, 6 Feb 2012 13:34:47 -0800 A method comprises receiving a sequence of unique memory addresses associated with concatenated, convolutionally encoded data elements. The method also comprises identifying each of the unique memory addresses as being included in one group of a plurality of address groups. Each address group substantially includes an equivalent number of unique... http://www.freshpatents.com/-dt20120202ptan20120030545.php Mon, 6 Feb 2012 13:34:47 -0800 Apparatus and methods store error recovery data in different dimensions of a memory array. For example, in one dimension, block error correction codes (ECC) are used, and in another dimension, supplemental error correction codes, such as convolutional codes, are used. By using separate dimensions, the likelihood that a defect affects... http://www.freshpatents.com/-dt20120202ptan20120030546.php Mon, 6 Feb 2012 13:34:47 -0800 A text watermarking method embeds an auxiliary message in an original electronic text document to form a watermarked text document. The method applies a spreading function to message symbols to spread the symbols over a carrier, which forms a modulated carrier. It maps elements of the modulated carrier to corresponding... http://www.freshpatents.com/-dt20120202ptan20120030547.php Mon, 6 Feb 2012 13:34:47 -0800 A vital-signs device in a patient monitoring system is disclosed. The patch includes a housing configured to be attached to the skin of a patient. The housing contain monitoring circuitry configured to acquire and store measurements of vital signs of the patient, a wireless transmitter configured to transmit signals to... http://www.freshpatents.com/-dt20120202ptan20120030548.php Mon, 6 Feb 2012 13:34:47 -0800 The present invention relates to an error control technology in the communication system and discloses a method and an apparatus for implementing Cyclic Redundancy Check (CRC) codes to improve the operation performance of the system significantly and satisfy operation requirements when processing high-rate CRC data. The method includes: performing at... http://www.freshpatents.com/-dt20120202ptan20120030549.php Mon, 6 Feb 2012 13:34:47 -0800 A data transmission detecting device including a detecting module and a detection value calculating module is provided. The detecting module has a plurality of receiving terminals and receives a first data and a second data during a first period. The detecting module calculates a total detection value according to the...