http://www.freshpatents.com/Miscellaneous-active-electrical-nonlinear-devices-circuits-and-systems-dtnewntc327.php USPTO Class 327 - Miscellaneous active electrical nonlinear devices, circuits, and systems en-us Thu, 24 Jul 2008 15:01:33 -0700 1000 Wednesday Thursday Friday Saturday Sunday 141 31 http://www.freshpatents.com/index.php?rss=true http://www.freshpatents.com/images/freshpatentsnav_rss.gif http://www.freshpatents.com/Method-and-apparatus-for-implementing-efuse-sense-amplifier-testing-without-blowing-the-efuse-dt20080717ptan20080169843.php Thu, 24 Jul 2008 15:01:33 -0700 A method and apparatus implement effective testing of a sense amplifier for an eFuse without having to program or blow the eFuse, and a design structure on which the subject circuit resides is provided. After initial processing of the sense amplifier, testing determines whether the sense amplifier can generate a... http://www.freshpatents.com/Voltage-detection-circuit-in-an-integrated-circuit-and-method-of-generating-a-trigger-flag-signal-dt20080717ptan20080169844.php Thu, 24 Jul 2008 15:01:33 -0700 An integrated circuit that includes at least one tunneling device voltage detection circuit for generating a trigger flag signal. The tunneling device voltage detection circuit includes first and second voltage dividers receiving a supply voltage and having corresponding respective first and second internal node output voltages. The first and second... http://www.freshpatents.com/Sensors-using-a-passive-s-h-and-dda-dt20080717ptan20080169845.php Thu, 24 Jul 2008 15:01:33 -0700 A CMOS image sensor includes a photosensitive region for collecting charge in response to incident light; a charge-to-voltage mechanism for receiving the charge from the photosensitive region and converting the charge to a voltage; an amplifier for receiving and amplifying the voltage; a sample and hold circuit includes (i) a... http://www.freshpatents.com/High-efficiency-nltl-comb-generator-using-time-domain-waveform-synthesis-technique-dt20080717ptan20080169846.php Thu, 24 Jul 2008 15:01:33 -0700 A device and method are disclosed for synthesizing a waveform having pulse segments. An exemplary generator can include units having a time delay element and pulse generator generating the pulse segments. An input divider divides an input signal into signal instances that propagate through the units and an output combiner... http://www.freshpatents.com/Driver-and-driver-receiver-system-dt20080717ptan20080169847.php Thu, 24 Jul 2008 15:01:33 -0700 A driver includes an output circuit which converts an input signal to a predetermined output waveform and outputs the predetermined waveform to first and second output terminals, a first output resistor having one end connected to the first output terminal, a second output resistor having one end connected to the... http://www.freshpatents.com/High-speed-leaf-clock-frequency-divider-splitter-dt20080717ptan20080169848.php Thu, 24 Jul 2008 15:01:33 -0700 A novel clock splitter that has a local internal clock frequency-divider is presented. The clock splitter comprises an oscillator clock splitter, wherein the oscillator clock splitter splits an oscillator clock signal into a B clock and a C clock; a clock frequency-divider, wherein the clock frequency-divider selectively suppresses clock pulses... http://www.freshpatents.com/System-and-method-for-implementing-a-dual-mode-pll-to-support-a-data-transmission-procedure-dt20080717ptan20080169849.php Thu, 24 Jul 2008 15:01:33 -0700 A system and method for effectively utilizing a dual-mode phase-locked loop to support a data transmission procedure includes a voltage controlled oscillator that generates a receiver clock signal in response to VCO input control signals. A binary phase detector generates a BPD output signal during a BPD mode by comparing... http://www.freshpatents.com/Phase-locked-loop-circuit-dt20080717ptan20080169850.php Thu, 24 Jul 2008 15:01:33 -0700 A phase-locked loop circuit comprises a phase frequency detector, a charge pump associated with a loop capacitance, and a voltage controlled oscillator. The phase frequency detector receives a reference clock signal on a first input and a feedback signal from the voltage controlled oscillator on a second input. The charge... http://www.freshpatents.com/Apparatus-for-detecting-and-preventing-a-lock-failure-in-a-delay-locked-loop-dt20080717ptan20080169853.php Thu, 24 Jul 2008 15:01:33 -0700 An apparatus for detecting a lock failure and correcting a duty cycle includes a lock failure detector configured to determine whether a first internal clock signal is locked to a second internal clock signal and to output a lock failure signal in response thereto, a duty cycle correction unit configured... http://www.freshpatents.com/Delay-locked-loop-dt20080717ptan20080169851.php Thu, 24 Jul 2008 15:01:33 -0700 In a delay locked loop, a phase detector compares the phases of an input signal and an output signal; a delay line delays the input signal, wherein the delay line includes a plurality of unit delay elements connected in series and the value of the unit delay of each of... http://www.freshpatents.com/Delay-locked-loop-circuits-and-method-for-controlling-the-same-dt20080717ptan20080169852.php Thu, 24 Jul 2008 15:01:33 -0700 A delay locked loop circuit and a method for controlling the same including a delay locked loop (DLL) circuit for receiving an external clock signal and generating an internal clock signal synchronized to the external clock signal includes at least two delay chains having different types of delay cells for... http://www.freshpatents.com/Method-and-device-for-determining-trim-solution-dt20080717ptan20080169854.php Thu, 24 Jul 2008 15:01:33 -0700 A trimming system for determining a trim solution for a semiconductor device includes an internal value generating circuit for generating an internal value based upon a counter value. The relationship between the internal delay value and an external reference is compared to determine if the counter value is a possible... http://www.freshpatents.com/Apparatus-and-method-for-correcting-duty-cycle-of-clock-signal-dt20080717ptan20080169855.php Thu, 24 Jul 2008 15:01:33 -0700 An apparatus for correcting a duty cycle of an input clock signal to generate a digitally corrected clock signal includes a duty cycle detector, an analog duty cycle correcting unit, and a digital duty cycle correcting unit. The duty cycle detector generates a duty cycle signal indicating a respective duty... http://www.freshpatents.com/System-and-apparatus-to-activate-electric-triggers-dt20080717ptan20080169856.php Thu, 24 Jul 2008 15:01:33 -0700 The present invention provides a current impulse generator that is fed by a high voltage source. The high voltage from the source creates an electric field which turns into a corona current by means of a corona current source. The corona current source charges a floating electrode with electrostatic energy... http://www.freshpatents.com/Hierarchical-scalable-high-resolution-digital-programmable-delay-circuit-dt20080717ptan20080169857.php Thu, 24 Jul 2008 15:01:33 -0700 A hierarchical and modular clock programmable delay circuit structure is described that can achieve almost unlimited fine resolution and unlimited delay range. The same circuit may also be applied to critical circuits that require fine adjustment in timing applications. The modular design allows the circuit and its layout to be... http://www.freshpatents.com/Source-driver-and-level-shifting-apparatus-thereof-dt20080717ptan20080169858.php Thu, 24 Jul 2008 15:01:33 -0700 The present invention discloses a source driver and a level shifting apparatus thereof. The level shifting apparatus is used for shifting a level of a data signal. The level shifting apparatus comprises a first charge pump and a level shifter. The first charge pump supplies a first pumped voltage based... http://www.freshpatents.com/Drain-pumped-sub-harmonic-mixer-for-millimeter-wave-applications-dt20080717ptan20080169859.php Thu, 24 Jul 2008 15:01:33 -0700 A sub-harmonic mixer includes a first transistor having a source and a drain and a second transistor having a source connected to the source of the first transistor and a drain connected to the drain of the first transistor. A mixing transistor is configured to be biased in a linear... http://www.freshpatents.com/Multichip-package-having-a-plurality-of-semiconductor-chips-sharing-temperature-information-dt20080717ptan20080169860.php Thu, 24 Jul 2008 15:01:33 -0700 A multichip package in which characteristics of all semiconductor chips mounted thereon can be controlled in response to a change in temperature. The multichip package can include a substrate and a plurality of semiconductor chips that are sequentially stacked and mounted on the substrate. In this case, a temperature detection... http://www.freshpatents.com/Reference-current-source-circuit-and-infrared-signal-processing-circuit-dt20080717ptan20080169861.php Thu, 24 Jul 2008 15:01:33 -0700 The reference current source circuit 10 is provided with a current source circuit 1, a trimming fuse 3, a switching circuit 2 which connects/disconnects the current source circuit 1 and/from the trimming fuse 3, a NAND circuit 4 which controls the operation of the switching circuit 2, and a pull-down... http://www.freshpatents.com/Semiconductor-device-and-methods-for-controlling-its-patterns-dt20080717ptan20080169862.php Thu, 24 Jul 2008 15:01:33 -0700 A semiconductor device and a method for controlling its patterns is described where the electrical characteristics of the patterns formed by a double patterning process may be individually controlled responsive to critical dimensions (CDs) of the patterns. The method includes controlling two or more patterns having different CDs to optimally... http://www.freshpatents.com/Booster-circuit-dt20080717ptan20080169864.php Thu, 24 Jul 2008 15:01:33 -0700 A boosting circuit comprises a first boosting cell row and a second boosting cell row. The boosting circuit further comprises an analog comparison circuit for comparing the potential of boosting cells on the same stage, and selecting and outputting the lower or higher of the potentials. The potential of an... http://www.freshpatents.com/Semiconductor-integrated-circuit-device-including-charge-pump-circuit-capable-of-suppressing-noise-dt20080717ptan20080169863.php Thu, 24 Jul 2008 15:01:33 -0700 In a semiconductor integrated circuit device including a charge pump circuit flowing an operating current therethrough, a current circuit is adapted to receive the operating current and a substantially constant current and generate an inverse relative to the operating current and the substantially constant current.... http://www.freshpatents.com/Internal-voltage-generating-circuit-dt20080717ptan20080169865.php Thu, 24 Jul 2008 15:01:33 -0700 An internal voltage generating circuit includes a first detector that compares an internal voltage and a first reference voltage to output a first detection signal. A second detector compares a supply voltage and a second reference voltage to output a second detection signal. A loop selection oscillator performs an oscillation... http://www.freshpatents.com/Combined-charge-storage-circuit-and-bandgap-reference-circuit-dt20080717ptan20080169866.php Thu, 24 Jul 2008 15:01:33 -0700 A combined charge storage and bandgap reference is disclosed. In one embodiment, a system comprises a bandgap reference circuit; a charge storage circuit, wherein an output of the bandgap reference circuit is provided as an input to the charge storage circuit; and a control circuit in communication with the bandgap... http://www.freshpatents.com/Design-structure-for-low-voltage-applications-in-an-integrated-circuit-dt20080717ptan20080169867.php Thu, 24 Jul 2008 15:01:33 -0700 A design structure that includes at least one tunneling device voltage reference circuit for use in low voltage applications is disclosed. The tunneling device voltage reference circuit includes a pair of voltage dividing device stacks, one having a linear voltage output and the other having a non-linear voltage output. A... http://www.freshpatents.com/Layout-structure-of-semiconductor-device-dt20080717ptan20080169868.php Thu, 24 Jul 2008 15:01:33 -0700 In a layout structure capable of independent supply of a substrate or well potential from a power supply potential, further reduction in layout area is achieved. A reinforcing power supply cell is inserted in a cell line in which a plurality of cells are arranged in series. Each of the... http://www.freshpatents.com/Current-drive-circuit-reducing-vds-dependency-dt20080717ptan20080169870.php Thu, 24 Jul 2008 15:01:33 -0700 A first transistor is provided in a first route and a second transistor is provided in a second route, the first route and the second route constituting a current mirror circuit. The sources of the transistors are grounded. In order to match VDS of the first transistor and that of... http://www.freshpatents.com/Voltage-reference-circuit-for-low-voltage-applications-in-an-integrated-circuit-dt20080717ptan20080169869.php Thu, 24 Jul 2008 15:01:33 -0700 An integrated circuit that includes at least one tunneling device voltage reference circuit for use in low voltage applications is disclosed. The tunneling device voltage reference circuit includes a pair of voltage dividing device stacks, one having a linear voltage output and the other having a non-linear voltage output. A... http://www.freshpatents.com/Method-and-device-for-the-filtering-and-analogue-digital-conversion-of-analogue-signal-dt20080717ptan20080169871.php Thu, 24 Jul 2008 15:01:33 -0700 The invention relates to a method for the filtering and analog/digital conversion of an incoming analog signal including an analog filtering of the incoming analog signal so as to filter the frequency components located outside a desired frequency band, and a conversion of the filtered analog signal to a digital...